Monday 3 July 2017

BLITTER THOUGHTS


Many should know the great work over at https://www.chzsoft.de/asic-web/ in recovering some lost Atari files.  I saw in there 2 versions of the blitter IC. 1986 and 1988.   I did not see much difference between the 2 files other than some "double inverters" for example.  Mostly I assume Atari did that for a extra delay on some signals. Though while that is probably true to a point, I also see double inversions on some address and data lines.  The only reason I can think of doing that, other than the delay, is to clear up noise issues.. so here we go again..

Going back to my researching into some blitters not working on the MEGA ST, the notes I saw basically tally to the year of 1988.  Where blitters before that date would have issues in the MEGA ST. Ones dated later than 1988 would work fine.

What caught my attention is the Atari blitter being dated 1986 which must be the blitter which is "buggy" on the MEGA ST.  which means 2 years later in 1988 , Atari noticed the problem, updated the blitter to "cure" those issues.  So a new blitter was born.

It is hard to say exactly whats going on. For starters we have the "blitter patch" in the MEGA. As noted on my site some time ago, I have been removing that "patch" and so have others and nobody I know of has had any isuses.  This could mean those earlier blitters needed the patch and the later ones didn't.  Though I think there is more than one issue going on as usual.

It could be the blitter was updated to fix some issues in the STE for example. Though later the blitter fails in the MEGA ST, So Atari do the "blitter patch" to solve it. Mostly this seems to be down to manufacture of the blitter.  Though with little date to go on, its difficult to form any conclusions. Though its clear in any case, Atari must have had some noise issues on some machine in 1988 in order that they updated the blitter.

In anycase, as there is a 2 year gap with basically no changes, I am assuming the blitter schematic is a final one. Which gives me a thought to cloning it in a modern PLD.

Looking into it some more, it gets confusing as to what is going on.. Take this for example..
We basically have a clocked flipflop by the looks of it. Only it has a clock and a inverted clock.  The orange route shows "clock" and the green route "X clock" or "NOT Clock". This doesn't really make any sense as to what or why that is done.  I can only assume that the PLD used by Atari needed the design doing that way for some reason.  Maybe the software back in the 80's needed all inputs to be connected to something, even if it was totally pointless.

Similar there seems to be a tri-state buffer, giving dual outputs, feeding a inverter with dual inputs. I mean, for the love of god, WHY?!  To make it even more pointless, another double inversion at the end of the chain.

I can only assume here, again, both enable and NOT enable have to be wired up.  I'm also assuming the square OPAD is a output pad. Then it would make more sense that there is a tri-state buffer with a simple inverter on it.

We also have the 2 inverters which lead of to AI23.  I assume here that the OPAD actually is wired to A23 on the 68000 bus.. Double inversion, no idea, probably just to add some buffered delay there.

On the left we have AO23, So assume Address Output 23, which would make sense going to a PLD IO pin.  So really AI23 is just a feedback node from the 68000 bus.

Then we have logic blocks such as P7008.  I can only assume it is a 1 of 2 multiplexer. SA and SB are same signal inverted. So that would actually be a SELECT line to select A or B inputs.  Again it doesn't really make sense why there would be 2 select lines needing the inverter. Again I assume its just some "primitive" stuff going on in early the PLD design software.  If all that "logic" was taken out, the whole circuit would be a lot simpler.

If I can figure all this out, then there is no reason why this diagram can't be ported over to a Altera PLD and compiled into a new chip.  With blitters getting harder to find and only FPGA clones which are likely not 100% cycle correct, then cloning the blitter is at least a backup for the future.  It would also mean low cost blitters could be created for STFM machines I think a 100% compatible hardware clone can only be a good thing.

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